boot.s (23231B)
1 // assembler directives 2 .set noat // allow manual use of $at 3 .set noreorder // don't insert nops after branches 4 5 #include "macros.inc" 6 7 .equ EXCEPTION_TLB_MISS, 0x80000000 8 .equ SP_DMEM, 0xA4000000 9 .equ SP_IMEM, 0xA4001000 10 .equ MI_MODE_REG, 0xA4300000 11 .equ RI_MODE_REG, 0xA4700000 12 13 #ifdef VERSION_CN 14 .macro cn_li a b 15 li \a, \b 16 .endm 17 #else 18 .macro cn_li a b 19 lui \a, %hi(\b) 20 addiu \a, \a, %lo(\b) 21 .endm 22 #endif 23 24 // 0xA0000000-0xBFFFFFFF: KSEG1 direct map non-cache mirror of 0x00000000 25 // 0xA4000000-0xA4000FFF: RSP DMEM 26 27 // 0xA4000000-0xA400003F: ROM header 28 29 .section .text, "ax" 30 31 // 0xA4000040-0xA4000B6F: IPL3 32 33 // IPL3 entry point jumped to from IPL2 34 glabel ipl3_entry // 0xA4000040 35 mtc0 $zero, $13 36 mtc0 $zero, $9 37 mtc0 $zero, $11 38 cn_li $t0, RI_MODE_REG 39 lw $t1, 0xc($t0) 40 bnez $t1, .LA4000410 41 nop 42 addiu $sp, $sp, -0x18 43 sw $s3, ($sp) 44 sw $s4, 4($sp) 45 sw $s5, 8($sp) 46 sw $s6, 0xc($sp) 47 sw $s7, 0x10($sp) 48 cn_li $t0, RI_MODE_REG 49 lui $t2, (0xa3f80000 >> 16) 50 lui $t3, (0xa3f00000 >> 16) 51 cn_li $t4, MI_MODE_REG 52 ori $t1, $zero, 64 53 sw $t1, 4($t0) 54 li $s1, 8000 55 .LA400009C: 56 nop 57 addi $s1, $s1, -1 58 bnez $s1, .LA400009C 59 nop 60 sw $zero, 8($t0) 61 ori $t1, $zero, 20 62 sw $t1, 0xc($t0) 63 sw $zero, ($t0) 64 li $s1, 4 65 .LA40000C0: 66 nop 67 addi $s1, $s1, -1 68 bnez $s1, .LA40000C0 69 nop 70 ori $t1, $zero, 14 71 sw $t1, ($t0) 72 li $s1, 32 73 .LA40000DC: 74 addi $s1, $s1, -1 75 bnez $s1, .LA40000DC 76 ori $t1, $zero, 271 77 sw $t1, ($t4) 78 lui $t1, (0x18082838 >> 16) 79 ori $t1, (0x18082838 & 0xFFFF) 80 sw $t1, 0x8($t2) 81 sw $zero, 0x14($t2) 82 lui $t1, 0x8000 83 sw $t1, 0x4($t2) 84 move $t5, $zero 85 move $t6, $zero 86 lui $t7, (0xA3F00000 >> 16) 87 move $t8, $zero 88 lui $t9, (0xA3F00000 >> 16) 89 lui $s6, (0xA0000000 >> 16) 90 move $s7, $zero 91 lui $a2, (0xA3F00000 >> 16) 92 lui $a3, (0xA0000000 >> 16) 93 move $s2, $zero 94 lui $s4, (0xA0000000 >> 16) 95 addiu $sp, $sp, -0x48 96 move $fp, $sp 97 lui $s0, %hi(MI_VERSION_REG) 98 lw $s0, %lo(MI_VERSION_REG)($s0) 99 cn_li $s1, 0x01010101 100 bne $s0, $s1, .LA4000160 101 nop 102 li $s0, 512 103 ori $s1, $t3, 0x4000 104 b .LA4000168 105 nop 106 .LA4000160: 107 li $s0, 1024 108 ori $s1, $t3, 0x8000 109 .LA4000168: 110 sw $t6, 4($s1) 111 addiu $s5, $t7, 0xc 112 jal func_A4000778 113 nop 114 beqz $v0, .LA400025C 115 nop 116 sw $v0, ($sp) 117 li $t1, 8192 118 sw $t1, ($t4) 119 lw $t3, ($t7) 120 lui $t0, 0xf0ff 121 and $t3, $t3, $t0 122 sw $t3, 4($sp) 123 addi $sp, $sp, 8 124 li $t1, 4096 125 sw $t1, ($t4) 126 lui $t0, 0xb019 127 bne $t3, $t0, .LA40001E0 128 nop 129 lui $t0, 0x800 130 add $t8, $t8, $t0 131 add $t9, $t9, $s0 132 add $t9, $t9, $s0 133 lui $t0, 0x20 134 add $s6, $s6, $t0 135 add $s4, $s4, $t0 136 sll $s2, $s2, 1 137 addi $s2, $s2, 1 138 b .LA40001E8 139 nop 140 .LA40001E0: 141 lui $t0, 0x10 142 add $s4, $s4, $t0 143 .LA40001E8: 144 li $t0, 8192 145 sw $t0, ($t4) 146 lw $t1, 0x24($t7) 147 lw $k0, ($t7) 148 li $t0, 4096 149 sw $t0, ($t4) 150 andi $t1, $t1, 0xffff 151 li $t0, 1280 152 bne $t1, $t0, .LA4000230 153 nop 154 lui $k1, 0x100 155 and $k0, $k0, $k1 156 bnez $k0, .LA4000230 157 nop 158 lui $t0, (0x101C0A04 >> 16) 159 ori $t0, (0x101C0A04 & 0xFFFF) 160 sw $t0, 0x18($t7) 161 b .LA400023C 162 .LA4000230: 163 lui $t0, (0x080C1204 >> 16) 164 ori $t0, (0x080C1204 & 0xFFFF) 165 sw $t0, 0x18($t7) 166 .LA400023C: 167 lui $t0, 0x800 168 add $t6, $t6, $t0 169 add $t7, $t7, $s0 170 add $t7, $t7, $s0 171 addiu $t5, $t5, 1 172 sltiu $t0, $t5, 8 173 bnez $t0, .LA4000168 174 nop 175 .LA400025C: 176 #ifdef VERSION_CN 177 li $t0, 0xc0000000 178 #else 179 li $t0, 0xc4000000 180 #endif 181 sw $t0, 0xc($t2) 182 li $t0, 0x80000000 183 sw $t0, 0x4($t2) 184 move $sp, $fp 185 move $v1, $zero 186 .LA4000274: 187 lw $t1, 4($sp) 188 lui $t0, 0xb009 189 bne $t1, $t0, .LA40002D8 190 nop 191 sw $t8, 4($s1) 192 addiu $s5, $t9, 0xc 193 lw $a0, ($sp) 194 addi $sp, $sp, 8 195 li $a1, 1 196 jal func_A4000A40 197 nop 198 lw $t0, ($s6) 199 lui $t0, 8 200 add $t0, $t0, $s6 201 lw $t1, ($t0) 202 lw $t0, ($s6) 203 lui $t0, 8 204 add $t0, $t0, $s6 205 lw $t1, ($t0) 206 lui $t0, 0x400 207 add $t6, $t6, $t0 208 add $t9, $t9, $s0 209 lui $t0, 0x10 210 add $s6, $s6, $t0 211 b .LA400035C 212 .LA40002D8: 213 sw $s7, 4($s1) 214 addiu $s5, $a2, 0xc 215 lw $a0, ($sp) 216 addi $sp, $sp, 8 217 li $a1, 1 218 jal func_A4000A40 219 nop 220 lw $t0, ($a3) 221 lui $t0, 8 222 add $t0, $t0, $a3 223 lw $t1, ($t0) 224 lui $t0, 0x10 225 add $t0, $t0, $a3 226 lw $t1, ($t0) 227 lui $t0, 0x18 228 add $t0, $t0, $a3 229 lw $t1, ($t0) 230 lw $t0, ($a3) 231 lui $t0, 8 232 add $t0, $t0, $a3 233 lw $t1, ($t0) 234 lui $t0, 0x10 235 add $t0, $t0, $a3 236 lw $t1, ($t0) 237 lui $t0, 0x18 238 add $t0, $t0, $a3 239 lw $t1, ($t0) 240 lui $t0, 0x800 241 add $s7, $s7, $t0 242 add $a2, $a2, $s0 243 add $a2, $a2, $s0 244 lui $t0, 0x20 245 add $a3, $a3, $t0 246 .LA400035C: 247 addiu $v1, $v1, 1 248 slt $t0, $v1, $t5 249 bnez $t0, .LA4000274 250 nop 251 lui $t2, %hi(RI_REFRESH_REG) 252 sll $s2, $s2, 0x13 253 lui $t1, (0x00063634 >> 16) 254 ori $t1, (0x00063634 & 0xFFFF) 255 or $t1, $t1, $s2 256 sw $t1, %lo(RI_REFRESH_REG)($t2) 257 lw $t1, %lo(RI_REFRESH_REG)($t2) 258 lui $t0, (0xA0000300 >> 16) 259 ori $t0, (0xA0000300 & 0xFFFF) 260 lui $t1, (0x0FFFFFFF >> 16) 261 ori $t1, (0x0FFFFFFF & 0xFFFF) 262 and $s6, $s6, $t1 263 sw $s6, 0x18($t0) 264 move $sp, $fp 265 addiu $sp, $sp, 0x48 266 lw $s3, ($sp) 267 lw $s4, 4($sp) 268 lw $s5, 8($sp) 269 lw $s6, 0xc($sp) 270 lw $s7, 0x10($sp) 271 addiu $sp, $sp, 0x18 272 cn_li $t0, EXCEPTION_TLB_MISS 273 addiu $t1, $t0, 0x4000 274 addiu $t1, $t1, -0x20 275 mtc0 $zero, $28 276 mtc0 $zero, $29 277 .LA40003D8: 278 cache 8, ($t0) 279 sltu $at, $t0, $t1 280 bnez $at, .LA40003D8 281 addiu $t0, $t0, 0x20 282 cn_li $t0, EXCEPTION_TLB_MISS 283 addiu $t1, $t0, 0x2000 284 addiu $t1, $t1, -0x10 285 .LA40003F8: 286 cache 9, ($t0) 287 sltu $at, $t0, $t1 288 bnez $at, .LA40003F8 289 addiu $t0, $t0, 0x10 290 b .LA4000458 291 nop 292 .LA4000410: 293 cn_li $t0, EXCEPTION_TLB_MISS 294 addiu $t1, $t0, 0x4000 295 addiu $t1, $t1, -0x20 296 mtc0 $zero, $28 297 mtc0 $zero, $29 298 .LA4000428: 299 cache 8, ($t0) 300 sltu $at, $t0, $t1 301 bnez $at, .LA4000428 302 addiu $t0, $t0, 0x20 303 cn_li $t0, EXCEPTION_TLB_MISS 304 addiu $t1, $t0, 0x2000 305 addiu $t1, $t1, -0x10 306 .LA4000448: 307 cache 1, ($t0) 308 sltu $at, $t0, $t1 309 bnez $at, .LA4000448 310 addiu $t0, $t0, 0x10 311 .LA4000458: 312 #ifdef VERSION_CN 313 la $t0, D_CN_0400049C 314 lui $t1, 0xf 315 ori $t1, $t1, 0xffff 316 and $t0, $t0, $t1 317 lui $t2, 0xa400 318 lui $t3, 0xfff0 319 and $t2, $t2, $t3 320 or $t0, $t0, $t2 321 la $t3, D_CN_0400074C 322 and $t3, $t3, $t1 323 or $t3, $t3, $t2 324 lui $t1, 0xa000 325 .LA4000474: 326 lw $t5, ($t0) 327 sw $t5, ($t1) 328 addiu $t0, $t0, 4 329 addiu $t1, $t1, 4 330 sltu $at, $t0, $t3 331 bnez $at, .LA4000474 332 nop 333 lui $t4, 0x8000 334 jr $t4 335 nop 336 lui $t3, 0xb000 337 lui $t2, 0x1fff 338 ori $t2, $t2, 0xffff 339 lw $t1, 8($t3) 340 and $t1, $t1, $t2 341 lui $at, 0xa460 342 sw $t1, ($at) 343 .LA40004B8: 344 lui $t0, 0xa460 345 lw $t0, 0x10($t0) 346 andi $t0, $t0, 2 347 bnez $t0, .LA40004B8 348 nop 349 #else 350 cn_li $t2, SP_DMEM 351 lui $t3, 0xfff0 352 lui $t1, 0x0010 353 and $t2, $t2, $t3 354 lui $t0, %hi(SP_DMEM_UNK0) 355 addiu $t1, -1 356 lui $t3, %hi(SP_DMEM_UNK1) 357 addiu $t0, %lo(SP_DMEM_UNK0) 358 addiu $t3, %lo(SP_DMEM_UNK1) 359 and $t0, $t0, $t1 360 and $t3, $t3, $t1 361 lui $t1, 0xa000 362 or $t0, $t0, $t2 363 or $t3, $t3, $t2 364 addiu $t1, $t1, 0 365 .LA4000498: 366 lw $t5, ($t0) 367 addiu $t0, $t0, 4 368 sltu $at, $t0, $t3 369 addiu $t1, $t1, 4 370 bnez $at, .LA4000498 371 sw $t5, -4($t1) 372 cn_li $t4, EXCEPTION_TLB_MISS 373 jr $t4 374 nop 375 lui $t3, %hi(D_B0000008) 376 lw $t1, %lo(D_B0000008)($t3) 377 lui $t2, (0x1FFFFFFF >> 16) 378 ori $t2, (0x1FFFFFFF & 0xFFFF) 379 lui $at, %hi(PI_DRAM_ADDR_REG) 380 and $t1, $t1, $t2 381 sw $t1, %lo(PI_DRAM_ADDR_REG)($at) 382 lui $t0, %hi(PI_STATUS_REG) 383 .LA40004D0: 384 lw $t0, %lo(PI_STATUS_REG)($t0) 385 andi $t0, $t0, 2 386 bnezl $t0, .LA40004D0 387 lui $t0, %hi(PI_STATUS_REG) 388 #endif 389 li $t0, 0x1000 390 add $t0, $t0, $t3 391 and $t0, $t0, $t2 392 lui $at, %hi(PI_CART_ADDR_REG) 393 sw $t0, %lo(PI_CART_ADDR_REG)($at) 394 cn_li $t2, 0x000FFFFF 395 lui $at, %hi(PI_WR_LEN_REG) 396 sw $t2, %lo(PI_WR_LEN_REG)($at) 397 398 .LA4000514: 399 nop 400 nop 401 nop 402 nop 403 nop 404 nop 405 nop 406 nop 407 nop 408 nop 409 nop 410 nop 411 nop 412 nop 413 nop 414 nop 415 nop 416 nop 417 nop 418 nop 419 nop 420 nop 421 nop 422 nop 423 nop 424 nop 425 nop 426 nop 427 lui $t3, %hi(PI_STATUS_REG) 428 lw $t3, %lo(PI_STATUS_REG)($t3) 429 andi $t3, $t3, 0x1 430 bnez $t3, .LA4000514 431 nop 432 #ifdef VERSION_CN 433 nop 434 nop 435 nop 436 nop 437 nop 438 nop 439 nop 440 nop 441 nop 442 nop 443 nop 444 nop 445 nop 446 nop 447 nop 448 nop 449 nop 450 nop 451 nop 452 nop 453 nop 454 nop 455 nop 456 nop 457 nop 458 nop 459 nop 460 nop 461 nop 462 nop 463 nop 464 nop 465 nop 466 nop 467 nop 468 nop 469 nop 470 nop 471 nop 472 nop 473 nop 474 nop 475 nop 476 nop 477 nop 478 nop 479 nop 480 nop 481 nop 482 nop 483 nop 484 nop 485 nop 486 nop 487 nop 488 nop 489 nop 490 nop 491 nop 492 nop 493 nop 494 nop 495 nop 496 nop 497 #endif 498 #ifdef VERSION_CN 499 lui $t1, %hi(SP_PC) 500 lw $t1, %lo(SP_PC)($t1) 501 beqz $t1, .LA4000698 502 nop 503 addiu $t2, $zero, 0x41 504 lui $at, %hi(SP_STATUS_REG) 505 sw $t2, %lo(SP_STATUS_REG)($at) 506 lui $at, %hi(SP_PC) 507 sw $zero, %lo(SP_PC)($at) 508 .LA4000698: 509 li $t3, 0x00AAAAAE 510 lui $at, %hi(SP_STATUS_REG) 511 sw $t3, %lo(SP_STATUS_REG)($at) 512 li $t0, 1365 513 lui $at, %hi(MI_INTR_MASK_REG) 514 sw $t0, %lo(MI_INTR_MASK_REG)($at) 515 lui $at, %hi(SI_STATUS_REG) 516 sw $zero, %lo(SI_STATUS_REG)($at) 517 lui $at, %hi(AI_STATUS_REG) 518 sw $zero, %lo(AI_STATUS_REG)($at) 519 li $t1, 2048 520 lui $at, %hi(MI_MODE_REG) 521 sw $t1, %lo(MI_MODE_REG)($at) 522 li $t1, 2 523 lui $at, %hi(PI_STATUS_REG) 524 sw $t1, %lo(PI_STATUS_REG)($at) 525 lui $t0, (0xA0000300 >> 16) 526 ori $t0, (0xA0000300 & 0xFFFF) 527 sw $s4, ($t0) 528 sw $s3, 4($t0) 529 #else 530 lui $t3, %hi(D_B0000008) 531 lw $a0, %lo(D_B0000008)($t3) 532 move $a1, $s6 533 lui $at, (0x5D588B65 >> 16) 534 ori $at, (0x5D588B65 & 0xFFFF) 535 multu $a1, $at 536 addiu $sp, $sp, -0x20 537 sw $ra, 0x1c($sp) 538 sw $s0, 0x14($sp) 539 lui $ra, 0x10 540 move $v1, $zero 541 move $t0, $zero 542 move $t1, $a0 543 li $t5, 32 544 mflo $v0 545 addiu $v0, $v0, 1 546 move $a3, $v0 547 move $t2, $v0 548 move $t3, $v0 549 move $s0, $v0 550 move $a2, $v0 551 move $t4, $v0 552 .LA40005F0: 553 lw $v0, ($t1) 554 addu $v1, $a3, $v0 555 sltu $at, $v1, $a3 556 beqz $at, .LA4000608 557 move $a1, $v1 558 addiu $t2, $t2, 1 559 .LA4000608: 560 andi $v1, $v0, 0x1f 561 subu $t7, $t5, $v1 562 srlv $t8, $v0, $t7 563 sllv $t6, $v0, $v1 564 or $a0, $t6, $t8 565 sltu $at, $a2, $v0 566 move $a3, $a1 567 xor $t3, $t3, $v0 568 beqz $at, .LA400063C 569 addu $s0, $s0, $a0 570 xor $t9, $a3, $v0 571 b .LA4000640 572 xor $a2, $t9, $a2 573 .LA400063C: 574 xor $a2, $a2, $a0 575 .LA4000640: 576 addiu $t0, $t0, 4 577 xor $t7, $v0, $s0 578 addiu $t1, $t1, 4 579 bne $t0, $ra, .LA40005F0 580 addu $t4, $t7, $t4 581 xor $t6, $a3, $t2 582 xor $a3, $t6, $t3 583 xor $t8, $s0, $a2 584 xor $s0, $t8, $t4 585 lui $t3, %hi(D_B0000010) 586 lw $t0, %lo(D_B0000010)($t3) 587 bne $a3, $t0, halt 588 nop 589 lw $t0, %lo(D_B0000014)($t3) 590 bne $s0, $t0, halt 591 nop 592 bal func_A4000690 593 nop 594 595 halt: 596 bal halt 597 nop 598 599 func_A4000690: 600 lui $t1, %hi(SP_PC) 601 lw $t1, %lo(SP_PC)($t1) 602 lw $s0, 0x14($sp) 603 lw $ra, 0x1c($sp) 604 beqz $t1, .LA40006BC 605 addiu $sp, $sp, 0x20 606 li $t2, 65 607 lui $at, %hi(SP_STATUS_REG) 608 sw $t2, %lo(SP_STATUS_REG)($at) 609 lui $at, %hi(SP_PC) 610 sw $zero, %lo(SP_PC)($at) 611 .LA40006BC: 612 li $t3, 0x00AAAAAE 613 lui $at, %hi(SP_STATUS_REG) 614 sw $t3, %lo(SP_STATUS_REG)($at) 615 lui $at, %hi(MI_INTR_MASK_REG) 616 li $t0, 1365 617 sw $t0, %lo(MI_INTR_MASK_REG)($at) 618 lui $at, %hi(SI_STATUS_REG) 619 sw $zero, %lo(SI_STATUS_REG)($at) 620 lui $at, %hi(AI_STATUS_REG) 621 sw $zero, %lo(AI_STATUS_REG)($at) 622 lui $at, %hi(MI_MODE_REG) 623 li $t1, 2048 624 sw $t1, %lo(MI_MODE_REG)($at) 625 li $t1, 2 626 lui $at, %hi(PI_STATUS_REG) 627 lui $t0, (0xA0000300 >> 16) 628 ori $t0, (0xA0000300 & 0xFFFF) 629 sw $t1, %lo(PI_STATUS_REG)($at) 630 sw $s7, 0x14($t0) 631 #endif 632 sw $s5, 0xc($t0) 633 #ifdef VERSION_CN 634 beqz $s3, .LA4000728 635 sw $s7, 0x14($t0) 636 b .LA4000730 637 lui $t1, 0xa600 638 #else 639 sw $s3, 0x4($t0) 640 beqz $s3, .LA4000728 641 sw $s4, ($t0) 642 lui $t1, 0xa600 643 b .LA4000730 644 addiu $t1, $t1, 0 645 #endif 646 .LA4000728: 647 cn_li $t1, 0xb0000000 648 .LA4000730: 649 sw $t1, 0x8($t0) 650 cn_li $t0, SP_DMEM 651 addi $t1, $t0, 0x1000 652 #ifdef VERSION_CN 653 .LA4000710: 654 sw $zero, ($t0) 655 addiu $t0, $t0, 4 656 bne $t0, $t1, .LA4000710 657 nop 658 #else 659 .LA4000740: 660 addiu $t0, $t0, 4 661 bne $t0, $t1, .LA4000740 662 sw $zero, -4($t0) 663 #endif 664 cn_li $t0, SP_IMEM 665 addi $t1, $t0, 0x1000 666 #ifdef VERSION_CN 667 .LA400072C: 668 sw $zero, ($t0) 669 addiu $t0, $t0, 4 670 bne $t0, $t1, .LA400072C 671 nop 672 #else 673 .LA4000758: 674 addiu $t0, $t0, 4 675 bne $t0, $t1, .LA4000758 676 sw $zero, -4($t0) 677 #endif 678 lui $t3, %hi(D_B0000008) 679 lw $t1, %lo(D_B0000008)($t3) 680 jr $t1 681 nop 682 nop 683 684 func_A4000778: 685 addiu $sp, $sp, -0xa0 686 #ifndef VERSION_CN 687 sw $s0, 0x40($sp) 688 sw $s1, 0x44($sp) 689 move $s1, $zero 690 move $s0, $zero 691 #endif 692 sw $v0, ($sp) 693 sw $v1, 4($sp) 694 sw $a0, 8($sp) 695 sw $a1, 0xc($sp) 696 sw $a2, 0x10($sp) 697 sw $a3, 0x14($sp) 698 sw $t0, 0x18($sp) 699 sw $t1, 0x1c($sp) 700 sw $t2, 0x20($sp) 701 sw $t3, 0x24($sp) 702 sw $t4, 0x28($sp) 703 sw $t5, 0x2c($sp) 704 sw $t6, 0x30($sp) 705 sw $t7, 0x34($sp) 706 sw $t8, 0x38($sp) 707 sw $t9, 0x3c($sp) 708 #ifdef VERSION_CN 709 sw $s0, 0x40($sp) 710 sw $s1, 0x44($sp) 711 #endif 712 sw $s2, 0x48($sp) 713 sw $s3, 0x4c($sp) 714 sw $s4, 0x50($sp) 715 sw $s5, 0x54($sp) 716 sw $s6, 0x58($sp) 717 sw $s7, 0x5c($sp) 718 sw $fp, 0x60($sp) 719 sw $ra, 0x64($sp) 720 #ifdef VERSION_CN 721 move $s0, $zero 722 move $s1, $zero 723 #endif 724 .LA40007EC: 725 jal func_A4000880 726 nop 727 addiu $s0, $s0, 1 728 #ifdef VERSION_CN 729 addu $s1, $s1, $v0 730 #endif 731 slti $t1, $s0, 4 732 bnez $t1, .LA40007EC 733 #ifdef VERSION_CN 734 nop 735 #else 736 addu $s1, $s1, $v0 737 #endif 738 srl $a0, $s1, 2 739 jal func_A4000A40 740 li $a1, 1 741 #ifdef VERSION_CN 742 srl $v0, $s1, 2 743 #else 744 lw $ra, 0x64($sp) 745 srl $v0, $s1, 2 746 lw $s1, 0x44($sp) 747 #endif 748 lw $v1, 4($sp) 749 lw $a0, 8($sp) 750 lw $a1, 0xc($sp) 751 lw $a2, 0x10($sp) 752 lw $a3, 0x14($sp) 753 lw $t0, 0x18($sp) 754 lw $t1, 0x1c($sp) 755 lw $t2, 0x20($sp) 756 lw $t3, 0x24($sp) 757 lw $t4, 0x28($sp) 758 lw $t5, 0x2c($sp) 759 lw $t6, 0x30($sp) 760 lw $t7, 0x34($sp) 761 lw $t8, 0x38($sp) 762 lw $t9, 0x3c($sp) 763 lw $s0, 0x40($sp) 764 #ifdef VERSION_CN 765 lw $s1, 0x44($sp) 766 #endif 767 lw $s2, 0x48($sp) 768 lw $s3, 0x4c($sp) 769 lw $s4, 0x50($sp) 770 lw $s5, 0x54($sp) 771 lw $s6, 0x58($sp) 772 lw $s7, 0x5c($sp) 773 lw $fp, 0x60($sp) 774 #ifdef VERSION_CN 775 lw $ra, 0x64($sp) 776 #endif 777 jr $ra 778 addiu $sp, $sp, 0xa0 779 780 func_A4000880: 781 addiu $sp, $sp, -0x20 782 sw $ra, 0x1c($sp) 783 move $t1, $zero 784 move $t3, $zero 785 move $t4, $zero 786 .LA4000894: 787 slti $k0, $t4, 0x40 788 #ifdef VERSION_CN 789 beqz $k0, .LA40008D4 790 nop 791 #else 792 beql $k0, $zero, .LA40008FC 793 move $v0, $zero 794 #endif 795 jal func_A400090C 796 move $a0, $t4 797 #ifdef VERSION_CN 798 blez $v0, .LA40008CC 799 nop 800 #else 801 blezl $v0, .LA40008CC 802 slti $k0, $t1, 0x50 803 #endif 804 subu $k0, $v0, $t1 805 multu $k0, $t4 806 #ifndef VERSION_CN 807 move $t1, $v0 808 #endif 809 mflo $k0 810 addu $t3, $t3, $k0 811 #ifdef VERSION_CN 812 move $t1, $v0 813 #else 814 nop 815 slti $k0, $t1, 0x50 816 #endif 817 .LA40008CC: 818 #ifdef VERSION_CN 819 addiu $t4, $t4, 1 820 slti $k0, $t1, 0x50 821 #endif 822 bnez $k0, .LA4000894 823 #ifdef VERSION_CN 824 nop 825 #else 826 addiu $t4, $t4, 1 827 #endif 828 sll $a0, $t3, 2 829 subu $a0, $a0, $t3 830 sll $a0, $a0, 2 831 subu $a0, $a0, $t3 832 sll $a0, $a0, 1 833 jal func_A4000980 834 addiu $a0, $a0, -0x370 835 #ifdef VERSION_CN 836 b .LA40008FC 837 nop 838 .LA40008D4: 839 move $v0, $zero 840 #else 841 b .LA4000900 842 lw $ra, 0x1c($sp) 843 move $v0, $zero 844 #endif 845 .LA40008FC: 846 lw $ra, 0x1c($sp) 847 .LA4000900: 848 #ifdef VERSION_CN 849 jr $ra 850 addiu $sp, $sp, 0x20 851 #else 852 addiu $sp, $sp, 0x20 853 jr $ra 854 nop 855 #endif 856 857 func_A400090C: 858 addiu $sp, $sp, -0x28 859 sw $ra, 0x1c($sp) 860 move $v0, $zero 861 jal func_A4000A40 862 li $a1, 2 863 move $fp, $zero 864 .LA40008FC_cn: 865 li $k0, -1 866 #ifdef VERSION_CN 867 sw $k0, ($s4) 868 sw $k0, ($s4) 869 sw $k0, 4($s4) 870 lw $v1, 4($s4) 871 srl $v1, $v1, 0x10 872 move $gp, $zero 873 #else 874 .LA4000928: 875 sw $k0, 4($s4) 876 lw $v1, 4($s4) 877 sw $k0, ($s4) 878 sw $k0, ($s4) 879 move $gp, $zero 880 srl $v1, $v1, 0x10 881 #endif 882 .LA4000940: 883 andi $k0, $v1, 1 884 #ifdef VERSION_CN 885 beqz $k0, .LA4000928_cn 886 nop 887 #else 888 beql $k0, $zero, .LA4000954 889 addiu $gp, $gp, 1 890 #endif 891 addiu $v0, $v0, 1 892 #ifdef VERSION_CN 893 .LA4000928_cn: 894 srl $v1, $v1, 1 895 #endif 896 addiu $gp, $gp, 1 897 .LA4000954: 898 slti $k0, $gp, 8 899 bnez $k0, .LA4000940 900 #ifdef VERSION_CN 901 nop 902 #else 903 srl $v1, $v1, 1 904 #endif 905 addiu $fp, $fp, 1 906 slti $k0, $fp, 0xa 907 #ifdef VERSION_CN 908 bnez $k0, .LA40008FC_cn 909 nop 910 lw $ra, 0x1c($sp) 911 jr $ra 912 addiu $sp, $sp, 0x28 913 #else 914 bnezl $k0, .LA4000928 915 li $k0, -1 916 lw $ra, 0x1c($sp) 917 addiu $sp, $sp, 0x28 918 jr $ra 919 nop 920 #endif 921 922 func_A4000980: 923 addiu $sp, $sp, -0x28 924 sw $ra, 0x1c($sp) 925 sw $a0, 0x20($sp) 926 #ifndef VERSION_CN 927 sb $zero, 0x27($sp) 928 #endif 929 move $t0, $zero 930 move $t2, $zero 931 li $t5, 51200 932 #ifdef VERSION_CN 933 sb $zero, 0x27($sp) 934 #endif 935 move $t6, $zero 936 #ifdef VERSION_CN 937 .LA4000978: 938 #endif 939 slti $k0, $t6, 0x40 940 .LA40009A4: 941 #ifdef VERSION_CN 942 bnez $k0, .LA400098C_cn 943 nop 944 #else 945 bnezl $k0, .LA40009B8 946 move $a0, $t6 947 #endif 948 b .LA4000A30 949 move $v0, $zero 950 #ifdef VERSION_CN 951 .LA400098C_cn: 952 #endif 953 move $a0, $t6 954 #ifndef VERSION_CN 955 .LA40009B8: 956 #endif 957 jal func_A4000A40 958 li $a1, 1 959 jal func_A4000AD0 960 addiu $a0, $sp, 0x27 961 jal func_A4000AD0 962 addiu $a0, $sp, 0x27 963 lbu $k0, 0x27($sp) 964 li $k1, 800 965 #ifdef VERSION_CN 966 multu $k0, $k1 967 mflo $t0 968 lw $a0, 0x20($sp) 969 subu $k0, $t0, $a0 970 bgez $k0, .LA40009CC 971 nop 972 subu $k0, $a0, $t0 973 .LA40009CC: 974 slt $k1, $k0, $t5 975 beqz $k1, .LA40009E0 976 nop 977 move $t5, $k0 978 move $t2, $t6 979 .LA40009E0: 980 lw $a0, 0x20($sp) 981 slt $k1, $t0, $a0 982 beqz $k1, .LA4000A00 983 nop 984 addiu $t6, $t6, 1 985 slti $k1, $t6, 0x41 986 bnez $k1, .LA4000978 987 nop 988 .LA4000A00: 989 addu $v0, $t2, $t6 990 srl $v0, $v0, 1 991 .LA4000A30: 992 lw $ra, 0x1c($sp) 993 jr $ra 994 addiu $sp, $sp, 0x28 995 #else 996 lw $a0, 0x20($sp) 997 multu $k0, $k1 998 mflo $t0 999 subu $k0, $t0, $a0 1000 bgezl $k0, .LA40009F8 1001 slt $k1, $k0, $t5 1002 subu $k0, $a0, $t0 1003 slt $k1, $k0, $t5 1004 .LA40009F8: 1005 beql $k1, $zero, .LA4000A0C 1006 lw $a0, 0x20($sp) 1007 move $t5, $k0 1008 move $t2, $t6 1009 lw $a0, 0x20($sp) 1010 .LA4000A0C: 1011 slt $k1, $t0, $a0 1012 beql $k1, $zero, .LA4000A2C 1013 addu $v0, $t2, $t6 1014 addiu $t6, $t6, 1 1015 slti $k1, $t6, 0x41 1016 bnezl $k1, .LA40009A4 1017 slti $k0, $t6, 0x40 1018 addu $v0, $t2, $t6 1019 .LA4000A2C: 1020 srl $v0, $v0, 1 1021 .LA4000A30: 1022 lw $ra, 0x1c($sp) 1023 addiu $sp, $sp, 0x28 1024 jr $ra 1025 nop 1026 #endif 1027 1028 func_A4000A40: 1029 addiu $sp, $sp, -0x28 1030 #ifdef VERSION_CN 1031 sw $ra, 0x1c($sp) 1032 lui $t7, 0x4200 1033 andi $a0, $a0, 0xff 1034 xori $a0, $a0, 0x3f 1035 li $k1, 1 1036 bne $a1, $k1, .LA4000A64 1037 nop 1038 #else 1039 andi $a0, $a0, 0xff 1040 li $k1, 1 1041 xori $a0, $a0, 0x3f 1042 sw $ra, 0x1c($sp) 1043 bne $a1, $k1, .LA4000A64 1044 lui $t7, 0x4600 1045 #endif 1046 lui $k0, 0x8000 1047 or $t7, $t7, $k0 1048 .LA4000A64: 1049 andi $k0, $a0, 1 1050 sll $k0, $k0, 6 1051 or $t7, $t7, $k0 1052 andi $k0, $a0, 2 1053 sll $k0, $k0, 0xd 1054 or $t7, $t7, $k0 1055 andi $k0, $a0, 4 1056 sll $k0, $k0, 0x14 1057 or $t7, $t7, $k0 1058 andi $k0, $a0, 8 1059 sll $k0, $k0, 4 1060 or $t7, $t7, $k0 1061 andi $k0, $a0, 0x10 1062 sll $k0, $k0, 0xb 1063 or $t7, $t7, $k0 1064 andi $k0, $a0, 0x20 1065 sll $k0, $k0, 0x12 1066 or $t7, $t7, $k0 1067 #ifdef VERSION_CN 1068 sw $t7, ($s5) 1069 li $k1, 1 1070 bne $a1, $k1, .LA4000AC0 1071 nop 1072 #else 1073 li $k1, 1 1074 bne $a1, $k1, .LA4000AC0 1075 sw $t7, ($s5) 1076 #endif 1077 lui $k0, %hi(MI_MODE_REG) 1078 sw $zero, %lo(MI_MODE_REG)($k0) 1079 .LA4000AC0: 1080 lw $ra, 0x1c($sp) 1081 #ifdef VERSION_CN 1082 jr $ra 1083 addiu $sp, $sp, 0x28 1084 #else 1085 addiu $sp, $sp, 0x28 1086 jr $ra 1087 nop 1088 #endif 1089 1090 func_A4000AD0: 1091 addiu $sp, $sp, -0x28 1092 sw $ra, 0x1c($sp) 1093 #ifdef VERSION_CN 1094 move $fp, $zero 1095 #endif 1096 li $k0, 0x2000 1097 lui $k1, %hi(MI_MODE_REG) 1098 sw $k0, %lo(MI_MODE_REG)($k1) 1099 #ifndef VERSION_CN 1100 move $fp, $zero 1101 #endif 1102 lw $fp, ($s5) 1103 li $k0, 0x1000 1104 sw $k0, %lo(MI_MODE_REG)($k1) 1105 #ifdef VERSION_CN 1106 move $k0, $zero 1107 #endif 1108 li $k1, 0x40 1109 and $k1, $k1, $fp 1110 srl $k1, $k1, 6 1111 #ifndef VERSION_CN 1112 move $k0, $zero 1113 #endif 1114 or $k0, $k0, $k1 1115 li $k1, 0x4000 1116 and $k1, $k1, $fp 1117 srl $k1, $k1, 0xd 1118 or $k0, $k0, $k1 1119 li $k1, 0x400000 1120 and $k1, $k1, $fp 1121 srl $k1, $k1, 0x14 1122 or $k0, $k0, $k1 1123 li $k1, 0x80 1124 and $k1, $k1, $fp 1125 srl $k1, $k1, 4 1126 or $k0, $k0, $k1 1127 li $k1, 0x8000 1128 and $k1, $k1, $fp 1129 srl $k1, $k1, 0xb 1130 or $k0, $k0, $k1 1131 li $k1, 0x800000 1132 and $k1, $k1, $fp 1133 srl $k1, $k1, 0x12 1134 or $k0, $k0, $k1 1135 sb $k0, ($a0) 1136 lw $ra, 0x1c($sp) 1137 #ifdef VERSION_CN 1138 jr $ra 1139 addiu $sp, $sp, 0x28 1140 .fill 0x30 1141 #else 1142 addiu $sp, $sp, 0x28 1143 jr $ra 1144 nop 1145 nop 1146 #endif